Allegro-OrCAD 17.20.018 x64

Allegro-OrCAD 17.20.018 x64 | 6.84 GB

INFORMATION

The schematic editor, compatible with OrCAD, and the ability to qualitatively import circuits, boards and libraries from P-CAD, coupled with a simple and user-friendly interface, make Cadence Allegro the best option for a gradual “seamless” transition to new technologies. Built-in Allegro reports provide the ability to output CAD on ESKD directly from CAD.

A convenient connection between the schematic editor and the PCB editor allows you to “drag” the component from the circuit to the board while placing, highlight the component on the circuit and see it on the board, highlight the output or circuit on the board and see it on the diagram. The functionality of a single component library reduces the number of errors associated with the human factor.

Support Only for 64-Bit Windows Operating Systems
The 17.2-2016 products are supported only on the following 64-bit versions of Windows
Operating systems:
â MicrosoftÂ® WindowsÂ® 7 (Enterprise, Ultimate, Professional, or Home Premium)
â MicrosoftÂ® WindowsÂ® 8 (All service packs, such as Windows 8.1)
â MicrosoftÂ® WindowsÂ® 10
â MicrosoftÂ® WindowsÂ® 2008 Server R2
â MicrosoftÂ® WindowsÂ® 2012 Server

What News ?
Fixed CCRs: SPB 17.2 HF018 04-23-2017

1721773 ADW ADW_UPREV adw_uprev updates all versions in history log to the new version. Should only insert note about uprev.
1684346 ADW LIBDISTRIBUTI lib_dist_client fails for new release 17.2-2016 design server
1696632 ADW LIBDISTRIBUTI lib_dist_client fails on release 17.2 Designer Server having release 16.6 Master Server
1705224 ADW LIBDISTRIBUTI Cannot migrate Library Footprint Models having subdirectory to release 17.2-2016
1721017 ADW LIBDISTRIBUTI adwserver -install fails intermittently during Master Library Server or MLR distribution
1711373 ALLEGRO_EDITOR COLOR Cannot interact with Allegro PCB Editor when Color dialog is open
1710772 ALLEGRO_EDITOR DATABASE Mirror command not working on zones
1725621 ALLEGRO_EDITOR DATABASE PCB Editor crashes when moving a group of components or clines
1699796 ALLEGRO_EDITOR EDIT_ETCH AiDT fails and reports there are no timing constraints even when propagation delay is set
1726483 ALLEGRO_EDITOR EDIT_ETCH PCB Editor crashing when converting corners to arcs
1726678 ALLEGRO_EDITOR INTERFACES IDX copper layer export does not export all pin pads
1691036 ALLEGRO_EDITOR MANUFACT Fillet not centered on trace
1732304 ALLEGRO_EDITOR MANUFACT Countersink does not have drill figure on NCCOUNTERDRILL-1 subclass
1719564 ALLEGRO_EDITOR OTHER Cannot open PDF published in release 17.2-2016 in third-party software
1723065 ALLEGRO_EDITOR OTHER PDF out does not print the outline correctly
1729247 ALLEGRO_EDITOR OTHER Cannot delete shape on Route Keepout layer
1722747 ALLEGRO_EDITOR PAD_EDITOR Option to enable ‘Connect by Touch’ in Pad Editor
1731643 ALLEGRO_EDITOR PAD_EDITOR Changes to secondary drill are not saved on padstack update
1727303 ALLEGRO_EDITOR REPORTS The ‘Shape Dynamic State’ report has changed to ‘Shape Dynamic Status’ in release 17.2-2016
1695879 ALLEGRO_EDITOR SHAPE Dynamic shape priority error creates shorts.
1713014 ALLEGRO_EDITOR SHAPE Incorrect behavior of donut shaped pads at certain rotations
1588769 ALLEGRO_EDITOR UI_GENERAL Alt+key shortcuts are not available in release 17.2
1602563 ALLEGRO_EDITOR UI_GENERAL Shortcuts to menu items not working in release 17.2
1603776 ALLEGRO_EDITOR UI_GENERAL Alt key not working with menu commands
1611516 ALLEGRO_EDITOR UI_GENERAL Keyboard shortcuts have no response
1647271 ALLEGRO_EDITOR UI_GENERAL Preselection is not working for docked Find window
1650044 ALLEGRO_EDITOR UI_GENERAL Keyboard shortcuts are not working properly in release 17.2
1651912 ALLEGRO_EDITOR UI_GENERAL Inconsistent response when using the Alt key
1679964 ALLEGRO_EDITOR UI_GENERAL Many dialog boxes are blurred in Allegro PCB Editor
1692416 ALLEGRO_EDITOR UI_GENERAL Underscores in menu commands denoting shortcuts are missing in release 17.2
1693055 ALLEGRO_EDITOR UI_GENERAL Reports with html links end with an extra > at the end
1693968 ALLEGRO_EDITOR UI_GENERAL Batch process that uses SKILL is taking too long to process files and generate reports
1698840 ALLEGRO_EDITOR UI_GENERAL In release 17.2-2016 Waive DRC report, selected coordinates of a Waived DRC remain blue
1703065 ALLEGRO_EDITOR UI_GENERAL Menu shortcuts do not work as expected
1707547 ALLEGRO_EDITOR UI_GENERAL Release 17.2: The Alt key function is not working in PCB Editor
1709280 ALLEGRO_EDITOR UI_GENERAL Alt+Function key not working in release 17.2.
1711203 ALLEGRO_EDITOR UI_GENERAL Color does not change for selected coordinates in reports and Show Element
1711724 ALLEGRO_EDITOR UI_GENERAL In release 17.2-2016, custom interactive menus stop responding when invoking another custom command
1715613 ALLEGRO_EDITOR UI_GENERAL With undocked Options window there is a mix up of entered text and funckey
1719301 ALLEGRO_EDITOR UI_GENERAL Selected coordinates do not change color in reports and Show Element
1724197 ALLEGRO_EDITOR UI_GENERAL Short cuts and hot keys not working in PCB Editor in release 17.2-2016
1728724 ALLEGRO_EDITOR UI_GENERAL Funckey is not working in release 17.2-2016
1673703 ALLEGRO_PROD_TOOLB OTHERS Design compare not reporting the Top and Bottom layer differences
1704474 ALLEGRO_PROD_TOOLB OTHERS When using Productivity Toolkit – PCB Design Compare, ‘Override undefined width’ is incorrectly applied
1571035 ALTM_TRANSLATOR CAPTURE Circles in third-party schematics not getting translated into Capture
1588911 ALTM_TRANSLATOR CAPTURE Capture crashes when translating, project and libraries are empty
1589394 ALTM_TRANSLATOR CAPTURE Schematic getting shifted off the page after translation
1631294 ALTM_TRANSLATOR CAPTURE Errors while translating third-party design when original design is in metric units
1663176 ALTM_TRANSLATOR CAPTURE Only first sheet of design getting translated from third-party schematic into Capture
1694363 ALTM_TRANSLATOR CAPTURE Capture is unable to translate third-party designs
1539739 ALTM_TRANSLATOR CORE Capture crashes on importing a third-party project
1542860 ALTM_TRANSLATOR CORE Capture crashes on clicking Translate after selecting a third-party design
1551642 ALTM_TRANSLATOR CORE Unable to import third-party schematics into Capture
1572929 ALTM_TRANSLATOR CORE Footprint names getting altered during translation
1568436 ALTM_TRANSLATOR PCB_EDITOR Unable to translate third-party layout data into PCB Editor
1629256 ALTM_TRANSLATOR PCB_EDITOR Getting empty symbol and devices folders when importing into PCB Editor
1664120 ALTM_TRANSLATOR PCB_EDITOR Import from third-party to PCB Editor is not translating data correctly
1701537 ALTM_TRANSLATOR PCB_EDITOR Import does not complete and reports errors
1698706 APD DIE_GENERATOR When using Compose Symbol from Geometry, circle from DXF cannot generate to pin
1714528 APD DIE_GENERATOR Getting ‘illegal pad pointer’ warning when creating die from geometry
1714532 APD DIE_GENERATOR Compose Die from Geometry creates incorrect pad shapes
1734310 APD MULTI_USER Symphony server mode malfunctions when die layer present.
1725506 APD SHAPE In release 17.2-2016 Hotfix 015, void is not generated in Artwork for BC7 layer causing short
1724395 APD WIREBOND Running axlBondWireDelete returns error message
1726609 ASDA CANVAS_EDIT Paste should not be allowed in the Current Refdes column of the Change Refdes form
1719754 CONCEPT_HDL ARCHIVER Path stored in the compressed file starts from /home instead of the current working directory
1726570 CONCEPT_HDL CHECKPLUS Checkplus crashes on Windows 10
1697977 CONCEPT_HDL CONSTRAINT_MG Differential pair disappears when it is packaged
1679575 CONCEPT_HDL CORE Page numbers are duplicated in Hierarchy Viewer when editing page names
1697732 CONCEPT_HDL CORE Pasting a signal name results in warning (SPCOCN-922) if the wire is too close to the edge of the page border
1711564 CONCEPT_HDL CREFER CRefer crashes while processing a hierarchical design containing subdesigns
1730736 CONCEPT_HDL OTHER Crash on generating BOM from design
1608350 CONSTRAINT_MGR CONCEPT_HDL Name of buffer model is not passed from Constraint Manager of DE-HDL to SigXplorer
1715803 CONSTRAINT_MGR CONCEPT_HDL Extract a net from constraint manager to SigXplorer, the models assigned are not displayed in SigXplorer
1718073 CONSTRAINT_MGR CONCEPT_HDL ECSet mapping errors on an upreved design in release 17.2: Pins in XNet and CSet do not match
1720886 CONSTRAINT_MGR CONCEPT_HDL SigXplorer does not extract assigned model from the schematic
1718514 CONSTRAINT_MGR ECS_APPLY Extracted topology does not use the PINUSE overrides specified on the canvas
1722306 GRE CORE Boards with Total Etch Length constraint only should not include z-axis when budgeting pin pairs
1710049 PSPICE SIMULATOR Functions are not taking parameters in correct order
1693021 SIG_INTEGRITY OTHER PINUSE is not updated correctly at model assignment with specific steps
1730854 SIP_LAYOUT SYMB_EDIT_APP Cannot delete all the die pin from a symbol using the Symbol Edit application mode