CadenceSPBOrCAD 17.20.028 Hotfix
RELEASE INFO:
CadenceSPBOrCAD 17.20.028 Hotfix | 1.6 GB
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OrCAD PCB design solutions provide a complete set of tools to help you achieve the results you need. From the initial schematic to the final artwork, the platform delivers a complete, integrated workflow.Comprehensive Circuit and Signal Analysis
The OrCAD environment offers proven analysis tools for signal integrity, analog and mixed signal, EMI analysis, and much more. All of these tools are seamlessly integrated so there are no translation errors.Customizable to Meet Your Needs
OrCAD tools have a fully open architecture platform. This means you can add unique functionality that is integrated into the program in the form of apps, or you can also build capability and flows yourself.Choose the OrCAD Suite that Best Fits Your Needs
We offer mainstream, cost effective and feature-rich PCB design solutions available as standalone products or in comprehensive suites starting with a fully functional free to use version. OrCAD PCB design suites can be expanded and upgraded as PCB challenges and the level of design sophistication grows.Fixed CCRs: SPB 17.2 HF028
10-14-2017
CCRID Product ProductLevel2 Title
1773530 ADW FLOW_MGR DE-HDL hangs on importing components from another design or copying and pasting components within a design
1790584 ADW FLOW_MGR SKILL code for comparing two PCB Editor .brd files does not work in EDM in release 17.2-2016
1794116 ADW FLOW_MGR LRM fails to run on project
1811532 ADW FLOW_MGR The message for missing tools.jar should not appear in adwcopyproject.log
1812109 ADW LRM Library revision manager displays errors while re-importing updated sub-blocks
1771851 ADW PCBCACHE Problem in packaging upreved imported block
1814785 ALLEGRO_EDITOR 3D_CANVAS PCB Editor crashes when a bend is created and then viewed in 3D Viewer
1800131 ALLEGRO_EDITOR DATABASE allegro_downrev_library utility fails on Windows 10
1814558 ALLEGRO_EDITOR DFM Silkscreen checks do not work if silkscreen is defined as mask in cross section
1814607 ALLEGRO_EDITOR DFM DFM check for soldermask does not include Package Geometry/ Soldermask if the soldermask is part of stackup
1813996 ALLEGRO_EDITOR EDIT_ETCH Add Connect crashes PCB Editor if clearance view is set to channel
1810832 ALLEGRO_EDITOR SCHEM_FTB Error while doing Export Physical from DE-HDL to PCB Editor
1811785 ALLEGRO_EDITOR SCHEM_FTB Import > Logic > Import Directory does not resolve the relative path to the packaged folder
1814166 ALLEGRO_EDITOR SCHEM_FTB Error message when exporting design to board using an earlier version of database
1817891 ALLEGRO_EDITOR SCHEM_FTB Error message when exporting design to board using an earlier version
1818954 ALLEGRO_EDITOR SCHEM_FTB Error message when exporting design to board using an earlier version of database
1812808 ALLEGRO_EDITOR SHAPE Artwork is different from PCB board
1814836 ALLEGRO_EDITOR SKILL Doing zcopy Xhatch pattern crashes PCB Editor in release 17.2-2016
1772218 ALLEGRO_EDITOR UI_GENERAL PCB Editor stops responding on Show Element
1778353 ALLEGRO_EDITOR UI_GENERAL Intermittent PCB Editor crashes on loading IDX in release 17.2-2016 Hotfix 020
1818077 ALLEGRO_EDITOR UI_GENERAL axlViewFileCreate disappears behind window or is blank
1807423 ASDA NEW_PROJECT SDA CPM file has erroneous date
1809597 CONCEPT_HDL CORE Problem auditing SI model in Allegro Design Entry HDL from Hotfix 025 onward, no problem in Hotfix 024
1810322 CONCEPT_HDL CORE Unable to package design if OK_NET_ONE_PIN property is set
1813436 CONCEPT_HDL CORE Read-only block import issue in same session: displays error message SPCOCD-553
1813912 CONCEPT_HDL CORE The response in DE-HDL is sometimes extremely slow
1812506 CONCEPT_HDL INTERFACE_DES Error messages during packaging followed by a success message though there are errors in design
1808677 CONSTRAINT_MGR CONCEPT_HDL Auto-generation of differential pair finds several instances of the same net
1808898 CONSTRAINT_MGR CONCEPT_HDL Unable to resolve the ECSet mapping errors if the topology has pin of PINUSE POWER & GROUND
1810320 CONSTRAINT_MGR CONCEPT_HDL DE-HDL – Constraint Manager: Cannot add group to net class if a net in group is a member of the net class
1812459 CONSTRAINT_MGR CONCEPT_HDL Auto-generation of differential pairs has issues
1796234 CONSTRAINT_MGR OTHER PCB Editor crashes on query (ALLOW_ON_ETCH_SUBCLASS) without data type defined
1811692 CONSTRAINT_MGR OTHER Constraint Manager: Set Topology Constraints – Rel Prop Delay – Pins is empty in release 17.2-2016 Hotfix 026
1816311 CONSTRAINT_MGR XNET_DIFFPAIR Extracting a differential pair into SigXplorer crashes DE-HDL
1807593 ORBITIO ALLEGRO_SIP_I Die symbol shifts when importing die from OrbitIO to SiP Layout
1800763 PSPICE SLPS Error while running co-simulation in MATLAB for PSpice-SLPS demo designsSystem Requirements: Cadence SPB OrCAD OrCAD 17.20
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